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holt integrated circuits www.holtic.com 1 HI-8597 3.3v single-rail arinc 429 differential line driver with integrated do-160g level 3 lightning protection ds8597 rev. f. 07/13 features ? internal lightning protection circuitry allows compliance with rtca/do-160g, section 22 level 3 pin injection test waveform set a (3 & 4), set b (3 & 5a) and set z (3 & 5b). ? operates from a single +3.3v supply ? superb short circuit capability on arinc 429 outputs (50v for 1 second) ? all arinc 429 voltage levels generated on-chip ? digitally selectable rise and fall times ? tri-state outputs ? 37.5 ohm output resistance allows direct connection to arinc 429 bus ? industrial and extended temperature ranges ? burn-in available pin configuration (top view) HI-8597psif HI-8597pstf nc 1 gnda 2 txaout 3 txbout 4 gndb 5 slp 6 tx0in 7 tx1in 8 16 vdd2- 15 cn+ 14 cn- 13 gnd 12 vdd 11 cp- 10 cp+ 9 vdd2+ 1 6 - p i n p l a s t i c es o i c p a c k a g e (wide body) table 1. function table tx1in tx0in slp txaout txbout slope 0 0 x 0v 0v n/a 0 1 0 -5v 5v 10s 0 1 1 -5v 5v 1.5s 1 0 0 5v -5v 10s 1 0 1 5v -5v 1.5s 1 1 x hi-z hi-z n/a general description the HI-8597 is a 3.3v single supply arinc 429 line driver with built-in lightning protection. the internal lightning protection circuitry allows compliance with rtca/do- 160g, section 22 level 3 pin injection test waveform set a (3 & 4), set b (3 & 5a) and set z (3 & 5b) without the use of any external components, an industry frst. pin surge levels for level 3 are summarized as follows: waveform 3 waveform 4 waveform 5a waveform 5b voc/isc voc/isc voc/isc voc/isc 600v/24a 300v/60a 300v/300a 300v/300a an internal 37.5 ohm resistor on each output enables direct connection to the arinc 429 bus. in addition, the device includes a dual polarity voltage doubler, allowing it to operate from a single +3.3v supply using only four external capacitors. other features include high-impedance outputs (tri- state) when both data inputs are taken high, allowing multiple line drivers to be connected to a common bus. bus pins feature built-in 8kv esd input protection (hbm), with 6kv capability on all other pins. all logic inputs are 5v or 3.3v compatible. the HI-8597 line driver is intended for use where logic signals must be converted to arinc 429 levels such as when using an fpga or the hi-3586 arinc 429 protocol ic. the single supply operation and internal lightning protection circuitry enable huge board space saving, making HI-8597 the most compact, cost effective arinc 429 line driver on the market today. the part is available in industrial -40 o c to +85 o c, or extended, -55 o c to +125 o c temperature ranges. optional burn-in is available on the extended temperature range. july 2013
holt integrated circuits 2 block diagram current control -5v 5v one null zero control logic txbout -5v 5v slp esd protection & voltage translation tx0in tx1in one null zero ?a? side gnda 3.3v v dd gnd v dd dual polarity voltage doubler vdd2+ txaout vdd2+ cp+ cp- c fly cn+ cn- c fly c supply control logic current control ?b? side 37.5 ohms 37.5 ohms c out vdd2- vdd2- c out vdd2+ vdd2+ gndb lightning protection lightning protection figure 1. HI-8597 block diagram HI-8597
holt integrated circuits 3 pin descriptions table 2. pin descriptions pin no. pin name function description 1 nc none no connect. 2 gnda power ground connection of internal lightning protection circuitry for arinc high output. must be tied to chip ground pin, gnd. 3 txaout output arinc high output with 37.5 ohms series resistance 4 txbout output arinc low output with 37.5 ohms series resistance 5 gndb power ground connection of internal lightning protection circuitry for arinc low output. must be tied to chip ground pin, gnd. 6 slp input output slew rate control. high selects arinc 429 high-speed. low selects arinc 429 low-speed. 7 tx0in input data input zero 8 tx1in input data input one 9 v dd2+ output voltage doubler positive output (~6.25v for 3.3v supply) 10 cp+ analog v dd2+ fyback capacitor, c fly ; positive terminal 11 cp- analog v dd2+ fyback capacitor, c fly ; negative terminal 12 v dd power +3.3v power supply 13 gnd power ground supply 14 cn- analog v dd2- fyback capacitor, c fly ; negative terminal 15 cn+ analog v dd2- fyback capacitor, c fly ; positive terminal 16 v dd2- output voltage doubler negative output (~ -6.1v for 3.3v supply) HI-8597
holt integrated circuits 4 functional description figure 1 shows a block diagram of the line driver. the HI-8597 is internally lightning protected in compliance with rtca/do-160g, section 22 level 3 pin injection test waveform set a (3 & 4), set b (3 & 5a) and set z (3 & 5b). the waveforms are shown in figure 5 through figure 7 . the device requires only a single +3.3v power supply. an integrated inverting / non-inverting voltage doubler generates the rail voltages (6.6v) which are then used to produce the 5v arinc-429 output levels. the internal dual polarity charge pump circuit requires four external capacitors, two for each polarity generated by the doubler. cp+ and cp- connect the external charge transfer or fy capacitor, c fly , to the positive portion of the doubler, resulting in twice v dd at the v dd2+ pin. an output hold capacitor, c out , is placed between v dd2+ and gnd. c out should be ten times the size of c fly . the inverting or negative portion of the converter works in a similar fashion, with c fly and c out placed between cn+ / cn- and v dd2- / gnd respectively. currents for slope control are set by on-chip resistors. the tx0in and tx1in inputs receive logic signals from a control transmitter chip such as the hi-3584 or hi-3586. txaout and txbout hold each side of the arinc bus at ground until one of the inputs becomes a one. if for example tx1in goes high, a charging path is enabled to 5v on an a side internal capacitor while the b side is enabled to -5v. the charging current is selected by the slp pin. if the slp pin is high, the capacitor is nominally charged from 10% to 90% in 1.5s. if slp is low, the rise and fall times are 10s. a unity gain buffer receives the internally generated slopes and differentially drives the arinc line. current is limited by the series output resistors at each pin. there are no fuses at the outputs of the HI-8597. the HI-8597 has 37.5 ohms in series with each txout output, allowing direct connection to the arinc 429 bus. the outputs are automatically lightning protected in compliance with rtca/do-160g, section 22 level 3 pin injection test waveform set a (3 & 4), set b (3 & 5a) and set z (3 & 5b) without any external components. tri-stateable outputs allow multiple line drivers to be connected to the same arinc 429 bus. setting tx1in and tx0in both to a logic 1 puts the outputs in the high-impedance state. absolute maximum ratings supply voltages v dd .......................................................... +5v power dissipation at 25 o c plastic soic ........... 1.0w, derate 10mw/ o c solder temperature (refow) .............................. 260 o c storage temperature ....................... -65 o c to +150 o c rtca/do-160g, section 22 pin injection waveform voc/isc 3 800v/32a 4 375v/75a 5a 375v/375a 5b 375v/375a recommended operating conditions supply voltages v dd ................................... +3.0v to +3.6v temperature range industrial screening .............. -40 o c to +85 o c hi-temp screening .............. -55 o c to +125 o c note: stresses above absolute maximum ratings or outside recom - mended operating conditions may cause permanent damage to the device. these are stress ratings only. operation at the limits is not recommended. HI-8597
holt integrated circuits 5 electrical characteristics table 3. dc electrical characteristics v dd = +3.3v, t a = operating temperature range (unless otherwise stated) parameters symbol test conditions min typ max units input voltage (tx1in, tx0in, slp) high low v ih v il 0.7v dd - - - - 0.3v dd v v input current (tx1in, tx0in, slp) source sink i ih i il v in = 0v v in = 3.3v, 7.34k pulldown - - - 45 0.1 a a arinc output voltage (differential) one zero null v diff1 v diff0 v diffn no load; txaout - txbout no load; txaout - txbout no load; txaout - txbout 9 -11 -0.5 10 -10 0 11 -9 0.5 v v v arinc output voltage (ref. to gnd) one or zero null v dout v nout no load & magnitude at pin no load 4.5 -0.25 5.0 0 5.5 0.25 v v operating supply current no load max. load arinc outputs shorted i ddnl i ddl i dds slp = v dd tx1in & tx0in = 0v 100khz, 400 load see note 1 - - - 65 130 330 100 - - ma ma ma arinc output impedance txout pins z out 37.5 ohms arinc output tri-state current i oz tx0in = tx1in = v dd , t a = 25 o c -5.5v < v out < +5.5v -200 200 a arinc output tri-state voltage v oz tx0in = tx1in = v dd , t a = 25 o c -150a < i out < +150a -5.5 - +5.5 v note 1: txaout and/or txbout shorted to each other or ground. HI-8597
holt integrated circuits 6 table 4. converter characteristics v dd = +3.3v, t a = operating temperature range (unless otherwise stated) parameters symbol test conditions min typ max units start-up transient (v+, v-) t start - - 10 ms operating switching frequency f sw - 650 - khz worst case maximum voltage doubler output v dd2+(max) v dd = 3.6v. t = -55 o c. open load. 6.93 v dc/dc convertor capacitor recommendations. for optimum performance use typical (not min.) values. for emc compliance, see an-135. c fly and c out caps are ceramic or tantalum, preferably multilayer, non polarized dielectric xr7, 10v min. c supply cap is tantalum 10v min. ratio of bulk storage to fy-back capacitors c out / c fly 2.2 10 fly-back capacitor (recommend ceramic, preferably multilayer, dielectric xr7 caps, 10v min.). c fly c fly(esr) c out / c fly >= 10 [0.5, 1.0]mhz 1.0 500 4.7 - f m bulk storage capacitor (recommend ceramic, preferably multilayer, dielectric xr7 caps, 10v min.). c out c out(esr) c out / c fly >= 10 [0.5, 1.0]mhz 2.2 300 47 - f m by-pass capacitor (recommend tantalum cap, 10v min.). c supply c supply >= c out (connect from v dd to gnd) table 5. ac electrical characteristics v dd = +3.3v, t a = operating temperature range (unless otherwise stated) parameters symbol test conditions min typ max units line driver propogation delay output high to low output low to high t phlx t plhx defned in figure 2 , no load - - 500 500 - - ns ns line driver transition times high speed output high to low output low to high low speed output high to low output low to high t fx t rx t fx t rx slp pin = logic 1 slp pin = logic 0 1.0 1.0 5.0 5.0 1.5 1.5 10.0 10.0 2.0 2.0 15.0 15.0 s s s s input capacitance (logic) 1 c in - - 10 pf output capacitance (tri-state) 1 c out tx0in = tx1in = v dd - - 10 pf notes: 1. guaranteed but not tested HI-8597
holt integrated circuits 7 0v 10v -10v 5v 0v 5v 0v 10% 90% t fx 10% 90% t phlx 10% tx1in tx0in v diff (txaout - txbout) t fx t rx t rx t plhx t phlx t plhx figure 2. line driver timing - 2000 - 1500 - 1000 - 500 0 500 1000 1500 2000 - 5.50 - 4.50 - 3.50 - 2.50 - 1.50 - 0.50 0.50 1.50 2.50 3.50 4.50 5.50 leakage current (ua) bus voltage (v) - 55c - 40c 25c +85c +125c figure 3. tri-state leakage current vs bus voltage at temperature. HI-8597
holt integrated circuits 8 - 125 - 100 - 75 - 50 - 25 0 25 50 75 100 125 - 5.50 - 4.50 - 3.50 - 2.50 - 1.50 - 0.50 0.50 1.50 2.50 3.50 4.50 5.50 leakage current (ua) bus voltage (v) 25c figure 4. tri-state leakage current vs bus voltage at room temperature. HI-8597
holt integrated circuits 9 lightning induced transient voltage waveforms waveform 3. 0 t 50% v or i largest peak 25% to 75% of largest peak figure 5. do-160g lightning induced transient voltage waveform 3. voc = 600v, isc = 24a, frequency = 1mhz 20%. waveform 4. 0 t 50% v or i peak t1 t2 t1 = 6.4s 20% t2 = 70s 20% figure 6. do-160g lightning induced transient voltage waveform 4. voc = 300v, isc = 60a. HI-8597
holt integrated circuits 10 waveform 5. v or i 0 t 50% peak t1 t2 5a: t1 = 40 s 20% t2 = 120 s 20% 5b: t1 = 50 s 20% t2 = 500 s 20% figure 7. do-160g lightning induced transient voltage waveforms 5a and 5b. voc = 300v, isc = 300a. ordering information part number lead finish f 100% matte tin (pb-free, rohs compliant) part number temperature range flow burn in i -40 o c to +85 o c i no t -55 o c to +125 o c t no m -55 o c to +125 o c m yes part number package description lead finish 8597ps 16 pin plastic small outline - wb soic (16hwe) solder hi - 8597px x x (plastic) HI-8597
holt integrated circuits 11 revision history revision date description of change ds8597, rev. new 11/9/12 initial release rev. a 12/11/12 clarify operating supply current for shorted arinc outputs. rev. b 01/21/13 change vss pin label to gnd and - to nc for clarifcation. add pin numbers to pin description table. rephrase guarantees compliance with do-160g level 3 to allows compliance with do-160g level 3. update tri-state leakage parameter to 200a. add absolute maximum ratings for lightning waveforms. rev. c 03/14/13 remove erroneous references to ampa and ampb outputs in footnote on page 5 . rev. d 05/08/13 corrected state of slp pin and erroneous reference to pin 1 in test conditions for line driver transition times (see ac characteristics table). rev. e 06/13/13 update operating supply current. rev. f 07/19/13 update operating supply current from 85ma to 100ma max. HI-8597
holt integrated circuits 12 package dimensions .008 .005 (.215 .115) .295 (7.5) bottom view .406 (10.3) .406 (10.3) .195 .015 (4.955 .385) .0161 .004 (.41 .10) top view .245 .015 (6.225 .385) 0 to 8 detail a .081 (2.05) .008 .004 (.20 .10) .033 .017 (.835 .435) see detail a .050 (1.27) bsc 16-pin plastic small outline (soic) - wb (wide body, thermally enhanced) inches (millimeters) package type: 16hwe electrically isolated heat sink pad on bottom of package. bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) bsc bsc bsc min. HI-8597

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